mirror of
https://github.com/Luzifer/vault-openvpn.git
synced 2024-11-14 02:52:44 +00:00
133 lines
2 KiB
ArmAsm
133 lines
2 KiB
ArmAsm
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// Copyright 2012 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// This code was translated into a form compatible with 6a from the public
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// domain sources in SUPERCOP: https://bench.cr.yp.to/supercop.html
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// +build amd64,!gccgo,!appengine
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#include "const_amd64.h"
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// func square(out, in *[5]uint64)
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TEXT ·square(SB),7,$0-16
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MOVQ out+0(FP), DI
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MOVQ in+8(FP), SI
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MOVQ 0(SI),AX
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MULQ 0(SI)
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MOVQ AX,CX
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MOVQ DX,R8
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MOVQ 0(SI),AX
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SHLQ $1,AX
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MULQ 8(SI)
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MOVQ AX,R9
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MOVQ DX,R10
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MOVQ 0(SI),AX
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SHLQ $1,AX
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MULQ 16(SI)
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MOVQ AX,R11
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MOVQ DX,R12
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MOVQ 0(SI),AX
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SHLQ $1,AX
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MULQ 24(SI)
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MOVQ AX,R13
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MOVQ DX,R14
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MOVQ 0(SI),AX
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SHLQ $1,AX
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MULQ 32(SI)
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MOVQ AX,R15
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MOVQ DX,BX
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MOVQ 8(SI),AX
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MULQ 8(SI)
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ADDQ AX,R11
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ADCQ DX,R12
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MOVQ 8(SI),AX
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SHLQ $1,AX
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MULQ 16(SI)
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ADDQ AX,R13
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ADCQ DX,R14
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MOVQ 8(SI),AX
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SHLQ $1,AX
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MULQ 24(SI)
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ADDQ AX,R15
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ADCQ DX,BX
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MOVQ 8(SI),DX
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IMUL3Q $38,DX,AX
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MULQ 32(SI)
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ADDQ AX,CX
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ADCQ DX,R8
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MOVQ 16(SI),AX
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MULQ 16(SI)
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ADDQ AX,R15
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ADCQ DX,BX
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MOVQ 16(SI),DX
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IMUL3Q $38,DX,AX
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MULQ 24(SI)
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ADDQ AX,CX
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ADCQ DX,R8
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MOVQ 16(SI),DX
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IMUL3Q $38,DX,AX
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MULQ 32(SI)
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ADDQ AX,R9
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ADCQ DX,R10
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MOVQ 24(SI),DX
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IMUL3Q $19,DX,AX
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MULQ 24(SI)
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ADDQ AX,R9
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ADCQ DX,R10
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MOVQ 24(SI),DX
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IMUL3Q $38,DX,AX
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MULQ 32(SI)
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ADDQ AX,R11
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ADCQ DX,R12
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MOVQ 32(SI),DX
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IMUL3Q $19,DX,AX
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MULQ 32(SI)
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ADDQ AX,R13
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ADCQ DX,R14
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MOVQ $REDMASK51,SI
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SHLQ $13,R8:CX
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ANDQ SI,CX
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SHLQ $13,R10:R9
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ANDQ SI,R9
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ADDQ R8,R9
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SHLQ $13,R12:R11
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ANDQ SI,R11
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ADDQ R10,R11
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SHLQ $13,R14:R13
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ANDQ SI,R13
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ADDQ R12,R13
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SHLQ $13,BX:R15
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ANDQ SI,R15
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ADDQ R14,R15
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IMUL3Q $19,BX,DX
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ADDQ DX,CX
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MOVQ CX,DX
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SHRQ $51,DX
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ADDQ R9,DX
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ANDQ SI,CX
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MOVQ DX,R8
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SHRQ $51,DX
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ADDQ R11,DX
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ANDQ SI,R8
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MOVQ DX,R9
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SHRQ $51,DX
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ADDQ R13,DX
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ANDQ SI,R9
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MOVQ DX,AX
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SHRQ $51,DX
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ADDQ R15,DX
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ANDQ SI,AX
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MOVQ DX,R10
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SHRQ $51,DX
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IMUL3Q $19,DX,DX
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ADDQ DX,CX
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ANDQ SI,R10
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MOVQ CX,0(DI)
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MOVQ R8,8(DI)
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MOVQ R9,16(DI)
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MOVQ AX,24(DI)
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MOVQ R10,32(DI)
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RET
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